This invention relates to the protection of power transistor switches during overload conditions.
Variable duty cycle controls are known wherein a power transistor switch in series with an electrical power source and a load is periodically turned on and off to regulate the average voltage supplied to the load. Change in load in such variable duty cycle control may draw more current from the transistor switch and cause it to experience abnormally high "on" voltages and move further into the active region with resultant increased voltage drop across the switch and increased heat losses that may damage the transistor switch and cause it to fail. Protection circuits, such as disclosed in my U.S. Pat. No. 3,855,520, are known for preventing failure of a transistor power switch utilizing conduction limit means responsive to the voltage across the power switch exceeding a predetermined magnitude for reducing the duty cycle of the control pulses that turn the power transistor switch on and off. Such conduction limit protective circuit is based upon the fact that the voltage drop across the transistor power switch increases rapidly at currents in excess of design limits because the base drive current is not sufficient to maintain low on-voltage at higher current, and such conduction limit protective circuit utilizes a voltage threshold detector to sense the collector-to-emitter voltage drop (V.sub.CE) across the power transistor switch and turn it off at high V.sub.CE values. Such conduction limit protective circuit tends to latch the power switch in the off state and consequently requires means to turn the transistor power switch on again. The conduction limit circuit disclosed in my U.S. Pat. No. 3,855,520 provides a narrow "guard" pulse at the beginning of each conduction period to defeat the conduction limit circuit for a short interval and thus permit the power transistor switch to again turn on. The guard pulse must be of sufficient width to assure turning on of the slowest of the paralleled transistors which comprise the power switch under rated current conditions. During the guard pulse there is no protection for the power transistors. Further, the width of the guard pulse and the voltage threshold "triggering" level do not adapt to the changing conditions to which the power transistor switch may be subjected such as variations in temperature, switching time, or voltage.